The 60 GHz millimetre wave frequency band has drawn an increasing interest over recent years to enable multi-gigabit-per-second wireless transmission for consumer electronics.  However, the 60 GHz radio frequency frontends induce several critical RF imperfections that must be addressed in 60 GHz system design, such as nonlinear distortions, phase noise, carrier frequency offset, and I-Q imbalance that give rise to a serious performance loss.

This research project involves the identification of the RF frontend non-idealities that will be considered in the 60 GHz system design and providing efficient methods to mitigate the signal distortions and impairments. Appropriate digital baseband modulation schemes and digital compensation techniques will be considered, and implemented on Field Programmable Gate Array (FPGA) platform.

Entry requirements: Candidates should have at least an upper second class honours degree (or equivalent) in communications, electronic/electrical engineering, or a related discipline. Applicants are expected to have good knowledge in wireless communication systems and theory. Proficient in Matlab/Simulink simulation tools, have expertise/interest on designing and coding FPGA implementation and good knowledge of digital signal processors (DSPs) with C/C++ programming language, good written and spoken communication skills. Due to funding restrictions the Studentship is open to Home/EU applicants only.

Bursary: The successful applicant will register for a full-time MPhil/PhD and receive a bursary of £15k per annum for up to three years (from which fees will be deducted, currently £3900 per annum).

How to apply: please click the APPLY button below, to download a copy of our research degree application form.  Please return it marked for the attention of Dr Louise Bright by email to researchoffice@southwales.ac.uk no later than the 31st July 2013.

Alternatively post to:

Dr Louise Bright
Research Office
The Lodge
University of South Wales
Pontypridd
CF37 1DL